Multitasking, time sharing, context switching and interrupts

Time sharing

Multitasking means running several processes apparently at the same time. On one core the OS uses time sharing: each process gets a short time slice (quantum) of CPU time, then the next process runs. The switches are so fast that users see all programs progressing together.

Context switching

A process's context is everything needed to resume it later: the contents of the PC, accumulator and other registers, the status register, and the stack pointer. In a context switch the OS:

1. saves the context of the current process (in its process control block or on a stack),

2. loads the saved context of the next process,

3. lets the next process run from where it stopped.

Context switching takes time in which no useful work is done, so too many switches waste CPU time.

Interrupts

An interrupt is a signal to the CPU that something needs attention, for example: a key pressed, data arrived from a network, a printer out of paper, a timer reaching the end of a time slice, or an error such as division by zero.

Interrupt handling:

1. At the end of each fetch-decode-execute cycle the CPU checks for interrupts.

2. If there is one of higher priority than the current task, the current context (PC and other registers) is saved, usually by pushing it onto the stack.

3. The PC is loaded with the address of the correct interrupt service routine (ISR), which runs.

4. When the ISR finishes, the saved context is restored (popped) and the interrupted task continues.

If a lower-priority interrupt arrives during an ISR it waits; a higher-priority one can interrupt the ISR. The timer interrupt is what makes time sharing possible.

Worked example

A user presses a key while a spreadsheet recalculates. Describe what the CPU does.

1. The keyboard sends an interrupt signal along the control bus.
2. At the end of the current FDE cycle the CPU detects it and compares priorities.
3. The spreadsheet's register contents are pushed onto the stack and the PC is loaded with the keyboard ISR address.
4. The ISR reads the key; then the registers are restored and the recalculation continues.

Answer: Save context, run the keyboard ISR, restore context, resume.

Check yourself

1. When does the CPU check for interrupts?
   • Only when the computer starts up
   • At the end of each fetch-decode-execute cycle
   • Halfway through decoding each instruction
   • Only when the user presses a key
   Show answer

   At the end of each fetch-decode-execute cycle. Checking after each cycle means the current instruction is never left half done.

2. Why must the contents of the registers be saved when an interrupt is serviced?
   • So the interrupt can be deleted
   • To make the clock run faster
   • Because the ISR cannot use registers
   • So the interrupted task can continue exactly where it stopped
   Show answer

   So the interrupted task can continue exactly where it stopped. The ISR will use the registers; the old values must be restored afterwards.

3. What is a context switch?
   • Changing the user interface from GUI to CLI
   • Saving the state of one process and loading the saved state of another
   • Moving a file from RAM to secondary storage
   • Switching the computer off and on again
   Show answer

   Saving the state of one process and loading the saved state of another. The 'context' is the register state of a process.

4. Four processes share one core using time slices of 20 ms, taking turns in order. Ignoring switching time, how many ms after its slice ends does a process get the CPU again?
   Show answer

   60 ms. The other three processes each run for 20 ms: 3 x 20 = 60 ms.

5. Each context switch takes 0.5 ms and each time slice is 10 ms. What percentage of the CPU time is spent switching, to 1 decimal place?
   Show answer

   4.8 %. Each cycle is 10 + 0.5 = 10.5 ms, of which 0.5 ms is switching: 0.5 / 10.5 x 100 = 4.8%.

6. What is loaded into the program counter when an interrupt is serviced?
   • The address of the next user instruction
   • Zero
   • The address of the interrupt service routine
   • The value in the accumulator
   Show answer

   The address of the interrupt service routine. The CPU jumps to the routine that deals with that interrupt.

7. An interrupt arrives during an ISR but has lower priority. What happens?
   • It waits until the current ISR has finished
   • It is discarded permanently
   • It stops the current ISR immediately
   • The computer restarts
   Show answer

   It waits until the current ISR has finished. Only higher-priority interrupts can interrupt an ISR.

8. Explain how timer interrupts make time sharing possible.
   Show answer

   A timer sends an interrupt when a process's time slice ends, so the OS regains control, saves the context of the current process and switches to the next process.. Without the timer, a process could keep the CPU forever.

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Sources

• Pearson Edexcel International Advanced Subsidiary/Advanced Level in Computer Science specification (2026)

Last updated 8 November 2026. Spotted a mistake? Tell us.