Assembly language: instructions, addressing and operations

Mnemonics, opcodes and operands

Each instruction is a mnemonic (a short memorable name for the opcode, the operation) followed by operands (the data or locations it works on).

ADD R2, R0, R1 means: opcode ADD; operands R2 (destination), R0 and R1. An assembler translates mnemonics into machine code. Text after a semicolon is a comment, ignored by the assembler: ; add the two values. Registers R0 to R12 are general purpose.

Addressing modes

• Immediate addressing: the operand is the value itself, written with #. MOV R0, #25 puts 25 into R0.
• Direct addressing: the operand is a memory address; the value is fetched from (or stored to) that address. LDR R1, 100 loads the contents of memory address 100 into R1; STR R1, 101 stores R1 into address 101.
• A register operand (R3) uses the value currently in that register.

The instruction set

These are the instructions in the instruction set printed with the Unit 3 sample paper. Rd is the destination register, Rn a source register; an operand is #n or a register.

The specification's Appendix 3 instruction set is given to you in the exam. This table follows the version printed with the Unit 3 sample paper; always use the one in your paper

Bitwise tricks

• AND with a mask keeps chosen bits and clears the rest: x AND 00001111 keeps the low 4 bits.
• ORR sets chosen bits to 1; EOR with 1s flips chosen bits.
• LSL by n multiplies an unsigned value by 2ⁿ; LSR by n divides by 2ⁿ (discarding the remainder).

Why assembly? Benefits: fast, compact code; direct control of hardware and registers; useful for embedded systems, device drivers and time-critical code. Drawbacks: hard to write, read and debug; one line does very little, so programs are long; specific to one processor family, so not portable.

Worked example

Write assembly code to load the values in addresses 50 and 51, add them, and store the sum in address 52.

1. LDR R0, 50 ; direct addressing: first value
2. LDR R1, 51 ; second value
3. ADD R2, R0, R1 ; R2 = R0 + R1
4. STR R2, 52 ; store the sum
5. HALT

Answer: LDR R0, 50 / LDR R1, 51 / ADD R2, R0, R1 / STR R2, 52 / HALT

Check yourself

1. What does the # in MOV R0, #12 indicate?
   • Direct addressing: 12 is a memory address
   • R0 is a comment
   • Immediate addressing: 12 is the value itself
   • The instruction is a branch
   Show answer

   Immediate addressing: 12 is the value itself. # marks an immediate value.

2. What does LDR R2, 120 do?
   • Loads the contents of memory address 120 into R2
   • Puts the number 120 into R2
   • Stores R2 into address 120
   • Branches to line 120
   Show answer

   Loads the contents of memory address 120 into R2. No #, so 120 is an address (direct addressing).

3. R0 holds 182 (binary 10110110). After AND R1, R0, #15, what denary value is in R1?
   Show answer

   6. 10110110 AND 00001111 = 00000110 = 6.

4. R0 holds 13. After LSL R1, R0, #3, what denary value is in R1?
   Show answer

   104. Shifting left 3 places multiplies by 2³ = 8: 13 x 8 = 104.

5. R0 holds 182. After LSR R1, R0, #2, what denary value is in R1?
   Show answer

   45. 10110110 shifted right 2 = 00101101 = 45.

6. R0 holds 90 (binary 01011010). After EOR R1, R0, #255, what denary value is in R1?
   Show answer

   165. XOR with 11111111 flips every bit: 10100101 = 165.

7. What is a mnemonic in assembly language?
   • A memory address
   • A comment explaining code
   • A register
   • A short memorable code for an opcode, such as ADD or LDR
   Show answer

   A short memorable code for an opcode, such as ADD or LDR. Mnemonics stand for machine code operations.

8. Which is a drawback of programming in assembly language?
   • It cannot access registers
   • It always runs slower than high-level code
   • Code is specific to one processor family, so it is not portable
   • It cannot use branches
   Show answer

   Code is specific to one processor family, so it is not portable. Each family has its own instruction set.

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Sources

• Pearson Edexcel International Advanced Subsidiary and Advanced Level in Computer Science specification (2026), Issue 1
• Pearson Edexcel IAL Computer Science sample assessment materials (Unit 3 paper, resource booklet and mark scheme)

Last updated 8 November 2026. Spotted a mistake? Tell us.