Harvard and von Neumann architecture

Von Neumann architecture

In the von Neumann (stored program) architecture, instructions and data share one memory and one set of buses (address, data and control).

• The processor fetches an instruction, then may fetch or store data, using the same buses each time.
• Only one memory transfer can happen at a time, so instruction fetches and data accesses queue up. This limit is called the von Neumann bottleneck.
• It is simple, flexible and cheap: memory can be shared between programs and data in any proportion.

Harvard architecture

The Harvard architecture has separate memories for instructions and data, each with its own buses.

• The processor can fetch the next instruction at the same time as it reads or writes data, so throughput rises.
• The two memories can be different types and sizes: for example, program code in non-volatile flash or ROM and data in RAM, with different word lengths.
• Instructions cannot be overwritten by a data error, which improves reliability.

Benefits and drawbacks of Harvard

Benefits: faster (parallel fetch and data access, no bottleneck); memory types can be matched to their job; program memory is protected from data writes.

Drawbacks: more complex and expensive (two buses, two memory controllers, more pins); free space in one memory cannot be used by the other; a program cannot easily treat code as data (for example, loading new programs at run time is harder).

Many modern CPUs use a modified Harvard design: separate instruction and data caches close to the core, but one shared main memory.

Completing a diagram

In a Harvard diagram, draw the processor (control unit, ALU, registers) in the middle, instruction memory on one side and data memory on the other, with a separate address bus and data bus to each. Input and output devices connect to the processor. A common exam error is drawing a single bus or a single memory.

Worked example

A washing machine controller runs a fixed program and stores sensor readings. Explain why a Harvard architecture suits it.

1. The program never changes, so it can sit in its own non-volatile instruction memory (flash or ROM).
2. Sensor readings change all the time, so they go in a separate, smaller data RAM.
3. Separate buses let the next instruction be fetched while a reading is stored, so a simple, low-power processor can still respond in time.

Answer: Separate instruction and data memories suit a fixed program with changing data, give parallel access for speed, and protect the program from being overwritten.

Check yourself

1. What is the defining feature of the Harvard architecture?
   • Instructions and data share one memory and one bus
   • Instructions and data are held in separate memories with separate buses
   • The processor has more than one core
   • Instructions are decoded by microcode
   Show answer

   Instructions and data are held in separate memories with separate buses. Harvard separates instruction memory from data memory, each with its own buses.

2. Which is an advantage of Harvard over von Neumann architecture?
   • Spare instruction memory can be used to store data
   • Only one set of buses is needed, so it is cheaper
   • Programs can easily modify their own code
   • An instruction can be fetched while data is being read or written
   Show answer

   An instruction can be fetched while data is being read or written. Parallel access to instruction and data memories removes the von Neumann bottleneck.

3. What is the von Neumann bottleneck?
   • The cache is too small to hold the program
   • Instruction fetches and data transfers must share one bus, so they cannot happen at the same time
   • The ALU can only add, not multiply
   • The clock cannot run faster than the memory
   Show answer

   Instruction fetches and data transfers must share one bus, so they cannot happen at the same time. With one shared path to memory, the processor often waits for the bus.

4. Which is a drawback of the Harvard architecture?
   • It is slower than von Neumann for every program
   • It cannot be used in embedded systems
   • Unused space in data memory cannot be used for instructions
   • It does not use a control unit
   Show answer

   Unused space in data memory cannot be used for instructions. The memories are fixed in size and separate, so free space in one cannot be borrowed by the other.

5. Where is a Harvard architecture most likely to be found?
   • A microcontroller in a microwave oven
   • A general-purpose desktop PC's main memory
   • A web server's hard disk
   • A printer cable
   Show answer

   A microcontroller in a microwave oven. Microcontrollers and DSPs commonly use Harvard designs with flash program memory and RAM for data.

6. What does a 'modified Harvard' processor usually have?
   • Two separate main memories and no caches
   • No registers
   • Separate instruction and data caches but one shared main memory
   • One cache shared by every core and no main memory
   Show answer

   Separate instruction and data caches but one shared main memory. Split level 1 caches give Harvard-style parallel access while main memory stays shared.

7. A student draws a Harvard system with one memory block joined to the processor by one bus. State the two changes needed.
   Show answer

   Split it into separate instruction memory and data memory, and give each its own set of buses (address and data) to the processor.. Harvard needs two memories (instructions, data) and a separate bus to each.

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Sources

• Pearson Edexcel International Advanced Subsidiary and Advanced Level in Computer Science specification (2026), Issue 1
• Pearson Edexcel IAL Computer Science sample assessment materials (Unit 3 paper, resource booklet and mark scheme)

Last updated 8 November 2026. Spotted a mistake? Tell us.