CISC and RISC processors

CISC

CISC = Complex Instruction Set Computer.

• A large set of instructions, some doing a lot of work (for example, one instruction that loads from memory, multiplies and stores the result).
• Instructions are variable length and take several clock cycles; many use microcode inside the control unit.
• Many addressing modes; instructions can work directly on memory.
• Programs are shorter (fewer instructions, less memory), and the compiler's job is easier.
• The chip is complex: more transistors, more power and more heat. Example family: x86 in most desktops.

RISC

RISC = Reduced Instruction Set Computer.

• A small set of simple instructions, each usually completing in one clock cycle.
• Instructions are fixed length with few addressing modes, so they are quick to decode and easy to pipeline.
• Load/store design: only load and store instructions touch memory; arithmetic works on registers, so RISC chips have many general-purpose registers.
• Programs are longer (more instructions) and the compiler does more work.
• Fewer transistors for control, so lower power and less heat: ideal for phones, tablets and embedded devices. Example family: ARM.

Comparing them

The table sums up the contrast you will be asked to describe.

Exam angle

When asked why RISC suits a battery-powered device, link a feature to an effect: *simpler instructions need fewer transistors and simpler decoding, so less power is used and the battery lasts longer*. When asked about CISC, link *complex instructions* to *fewer instructions per program, so less memory and simpler compilers*. Total time = instructions x cycles per instruction x time per cycle: CISC cuts the first, RISC cuts the second.

Worked example

Program X needs 200 CISC instructions averaging 4 cycles each, or 500 RISC instructions averaging 1.2 cycles each. Both chips run at the same clock speed. Which finishes first?

1. CISC cycles = 200 x 4 = 800
2. RISC cycles = 500 x 1.2 = 600
3. At the same clock speed, fewer cycles means less time.

Answer: RISC: 600 cycles against 800 cycles.

Check yourself

1. What does RISC stand for?
   • Rapid Instruction Sequence Controller
   • Register Indexed Storage Computer
   • Reduced Instruction Set Computer
   • Reduced Interrupt Signal Circuit
   Show answer

   Reduced Instruction Set Computer. RISC = Reduced Instruction Set Computer.

2. Which statement describes a typical RISC instruction?
   • It is fixed length and completes in about one clock cycle
   • It is variable length and uses microcode
   • It can add two values held in main memory directly
   • It takes many cycles but does a lot of work
   Show answer

   It is fixed length and completes in about one clock cycle. Simple fixed-length instructions are what make RISC fast to decode and pipeline.

3. Why do RISC processors suit battery-powered devices?
   • They have fewer registers, which saves memory
   • Their programs are shorter, so the screen uses less power
   • Simpler instructions need fewer transistors and simpler decoding, so less power is used
   • They run at a higher voltage
   Show answer

   Simpler instructions need fewer transistors and simpler decoding, so less power is used. Lower transistor count and simpler control logic mean lower power and less heat.

4. Which is an advantage of CISC over RISC?
   • Every instruction completes in one cycle
   • Programs need fewer instructions, so they take less memory
   • It is easier to pipeline
   • It uses less power
   Show answer

   Programs need fewer instructions, so they take less memory. Complex instructions do more each, so compiled programs are shorter.

5. In a RISC load/store design, which instructions may access main memory?
   • Every arithmetic instruction
   • Only branch instructions
   • No instructions; all data is in the cache
   • Only load and store instructions
   Show answer

   Only load and store instructions. Arithmetic works on registers; LDR and STR move data between memory and registers.

6. A RISC program runs 900 instructions at 1 cycle each. A CISC version runs 300 instructions at 4 cycles each. How many fewer clock cycles does the RISC version take?
   Show answer

   300 cycles. CISC: 300 x 4 = 1200 cycles. RISC: 900 x 1 = 900 cycles. Difference = 300 cycles.

7. In which design does the compiler do more of the work?
   • CISC, because it has more instructions to choose from
   • Neither, because compilers are not used with RISC
   • CISC, because it must translate microcode
   • RISC, because it must build complex operations from many simple instructions
   Show answer

   RISC, because it must build complex operations from many simple instructions. RISC moves complexity from hardware to software: the compiler emits more, simpler instructions.

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Sources

• Pearson Edexcel International Advanced Subsidiary and Advanced Level in Computer Science specification (2026), Issue 1
• Pearson Edexcel IAL Computer Science sample assessment materials (Unit 3 paper, resource booklet and mark scheme)

Last updated 8 November 2026. Spotted a mistake? Tell us.